In RISC-V, we can compare two registers and “branch” to a specific line of code depending on the result of the comparison.
We have:
beq x0, x1, branch_label # branch if equal
bne x0, x1, branch_label # branch if not equal
bge x0, x1, branch_label # branch if greater equal
bgeu x0, x1, branch_label # branch if greater equal unsigned
blt x0, x1, branch_label # branch if less than
bltu x0, x1, branch_label # branch if less than unsignedWe can use these to do if-else conditions, or loops.
Branches can use labels or immediates (which are relative to where the PC currently is)
It is structured as
| imm | rs2 | rs1 | funct3 | imm | opcode |
|---|---|---|---|---|---|
| 7 | 5 | 5 | 3 | 5 | 7 |
| 7 bit immediate | second operand | first operand | 3 bit function code | 5 bit immediate | 7bit operation code OP |
Unconditional Jumps
We have jump instructions
j imm # jump to the immediate
Because there are no conditions, there is a lot of space for immediates in the jump instruction
| imm | funct5 | opcode |
|---|---|---|
| 20 | 5 | 7 |
| 20 bit immediate | 5 bit function code | 7 bit operation code OP |
| 06.6 Assembler directives |