Lecture Notes

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ba2 EPFL

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CS 173

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Introduction

Introduction

May 19, 20261 min read

  • fds

Contents

Binary representations Verilog Risc-V assembly CPU

Exams

Midterm (23rd april) + Finals

Grade=Midterm⋅0.3+Finals⋅0.7 Rounded to the closest 0.25

Chapters

The numbering of these chapters is very arbitrary

  • Chapter 1
  • Chapter 2
  • Chapter 3
  • Chapter 4
  • Chapter 5
  • Chapter 6
  • Chapter 7

Exercises

All exercises I do are located on the respective course repository


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  • Exercises

Backlinks

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